Please use this identifier to cite or link to this item:
http://cris.utm.md/handle/5014/2133
DC Field | Value | Language |
---|---|---|
dc.contributor.author | ABABII, Victor | en_US |
dc.contributor.author | SUDACEVSCHI, Viorica | en_US |
dc.contributor.author | CARBUNE, Viorel | en_US |
dc.contributor.author | MUNTEANU, Silvia | en_US |
dc.contributor.author | ALEXEI, Victoria | en_US |
dc.contributor.author | LAȘCO, Victor | en_US |
dc.date.accessioned | 2023-12-05T12:47:34Z | - |
dc.date.available | 2023-12-05T12:47:34Z | - |
dc.date.issued | 2022 | - |
dc.identifier.citation | V. Ababii, V. Sudacevschi, V. Carbune, S. Munteanu, V. Alexei and V. Lasco, "A Method of Hardware Implementation of Membrane Computing Architectures for Mobile Robot Control," 2022 International Conference on Development and Application Systems (DAS), Suceava, Romania, 2022, pp. 52-56, doi: 10.1109/DAS54948.2022.9786079. | en_US |
dc.identifier.isbn | 978-1-6654-8162-5 | - |
dc.identifier.isbn | 978-1-6654-8163-2 | - |
dc.identifier.uri | http://cris.utm.md/handle/5014/2133 | - |
dc.description.abstract | This paper proposes a method of hardware implementation of the membrane computing architecture for the control of a mobile robot. The basic idea is to use in the development of control systems the models of functional description of living cells, which should ensure a process of design, modeling and implementation based on cognitive models. The implementation algorithm presents a sequence of operations involving: functional development and modeling of Computing Cells, development and modeling of the topology of the membrane computing system (P-System), their implementation in hardware description languages (AHDL), and configuration of the FPGA circuit for realization of the control system. For validation and analysis of the performance of the Computing Cells, Petri Net models are used, which ensure the identification of the concurrent processes while maintaining a maximum parallelism. Functional testing of membrane computing models was performed based on the Quartus II development environment, the AHDL hardware description language, and the Altera DE0 Board. | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEE | en_US |
dc.subject | membrane computing | en_US |
dc.subject | mobile robot control | en_US |
dc.subject | hardware implementation | en_US |
dc.subject | HDL | en_US |
dc.subject | FPGA | en_US |
dc.subject | DE0 | en_US |
dc.title | A Method of Hardware Implementation of Membrane Computing Architectures for Mobile Robot Control | en_US |
dc.type | Article | en_US |
dc.relation.conference | Development and Application Systems (DAS) | en_US |
dc.identifier.doi | 10.1109/DAS54948.2022.9786079 | - |
item.grantfulltext | open | - |
item.languageiso639-1 | other | - |
item.fulltext | With Fulltext | - |
crisitem.author.dept | Department of Computer Science and Systems Engineering | - |
crisitem.author.dept | Department of Computer Science and Systems Engineering | - |
crisitem.author.dept | Department of Computer Science and Systems Engineering | - |
crisitem.author.dept | Department of Computer Science and Systems Engineering | - |
crisitem.author.dept | Department of Computer Science and Systems Engineering | - |
crisitem.author.orcid | 0000-0002-0769-8144 | - |
crisitem.author.orcid | 0000-0002-1556-4453 | - |
crisitem.author.parentorg | Faculty of Computers, Informatics and Microelectronics | - |
crisitem.author.parentorg | Faculty of Computers, Informatics and Microelectronics | - |
crisitem.author.parentorg | Faculty of Computers, Informatics and Microelectronics | - |
crisitem.author.parentorg | Faculty of Computers, Informatics and Microelectronics | - |
crisitem.author.parentorg | Faculty of Computers, Informatics and Microelectronics | - |
Appears in Collections: | Proceedings Papers |
Files in This Item:
File | Description | Size | Format | |
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A_Method_of_Hardware_Implementation_ABABII_Victor.pdf | 49.61 kB | Adobe PDF | View/Open |
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